Copper is the fundamental conductor used to create printed circuit board (PCB) traces for transmitting power and signals. The properties and handling of this copper metal have enormous impacts on the performance, cost, and reliability of commercial electronic products.
This article explains key facts designers must understand about PCB copper materials from electrical capabilities to manufacturing processes. Mastering these core copper literacies will aid greatly in delivering successful boards.
1. Copper Conductivity & Current Limits
The exceptional conductivity of copper makes it the conductor of choice for printed circuits. Some key electrical properties include:
Conductivity
- Pure Copper: 5.80 x 107 S/m
- Bulk Copper: 5.50 x 107 S/m
Current Carrying Limits
| Copper Thickness | Maximum Current |
|---|---|
| 0.5 oz (18 um) | 1.2 A |
| 1 oz (35 um) | 2 A |
| 2 oz (70 um) | 3 A |
Knowing specs like conductivity and current thresholds helps inform trace sizing needs.
2. Copper Surface Roughness Concerns
While copper offers excellent bulk conductivity, the surface roughness of foil layers impacts high-speed signal losses and performance.
Very Low Profile (VLP) foils provide extremely smooth surfaces - down to 35 μin (0.9 μm) roughness - essential for mitigating fine-geometry losses. Ensuring spec and use of proper copper finishes minimizes microscopically uneven signal propagation surfaces.
3. Copper Trace Manufacturing Capabilities
common copper features sizes range from:
Line Widths
- PCB Fabricator: 100 micron traces
- HDI PCBs: 15-20 micron traces
Spacing
- PCB Fabricator: 100 micron line spacing
- HDI PCBs: 15-20 micron spacing
Understanding manufacturer capabilities for trace geometries informs minimum design rules and process selection.
4. Copper Layer Count Limits
Complex designs can quickly demand higher layer counts with extreme functionality incorporation or dense routing. Fabrication capabilities determine quantities of copper layers achievable:
| PCB Type | Potential Layers |
|---|---|
| Standard Multilayer | 16 layers |
| High Density Interconnect (HDI) | 36-52 layers |
| Any-Layer HDI | 100+ layers |
Layer densities and stack-up arrangements influence achievable layer quantities.
5. Copper Weights - Oz and Thickness
Copper foil thicknesses use weight per square foot designations called ounces (oz). Common weights include:
- 1 oz = 35 μm
- 2 oz = 70 μm
- 3 oz = 105 μm
Heavier copper layers handle more current load, while thinner foils suit fine feature sizes. Following manufacturers’ suggested oz definitions ensures obtaining correct copper thicknesses.
6. Copper Plating for PCB Finishes
PCB surface finishes deposit thin plating layers onto pad/trace copper to facilitate soldering and protect against oxidation:
| Finish | Composition | Thickness |
|---|---|---|
| Immersion Tin | Tin | 0.5-1 μm |
| Immersion Silver | Silver | 0.05-0.1 μm |
| Organic Solderability Preservative (OSP) | OSP Material | 0.1-0.2 μm |
| Electroless Nickel Immersion Gold (ENIG) | Nickel / Gold | 3-5 μm / 0.05-0.1 μm |
The chosen finish impacts solderability, longevity, and cost considerations.
7. Copper Balance to Control Warping
Matching copper weights on either side of the board centerline ensures controlled expansion/contraction behavior against temperature changes:
<img src="images/balanced-layers.png" width="300">Symmetric copper balances minimize warping risk. Recognizing this principle early aids stackup configuration.
8. Copper Pour Relief Strategies
Copper pours require openings along their edges wherever traces enter pads to mitigate tear concerns:
<img src="images/thermal-relief-pad.png" width="300">Various thermal relief patterns enable trace connections safely.
Conclusion
Leveraging copper optimally requires understanding key electrical, manufacturing, and design principles covered here. Applying these copper literacies will help elevate PCB creation proficiency for avoiding pitfalls and maximizing performance.
FAQ
What are the tradeoffs of thinner vs thicker copper weights?
Thinner copper enables finer lines and spaces. But it handles less current load. Heavier copper offers higher ampacity but struggles with fine feature definition.
Why is surface roughness problematic at higher frequencies?
Rough surfaces introduce moreSignal loss tangent effects become more pronounced across microscopically uneven foil surfaces at RF and multi-gigabit rates.
When would ENIG vs immersion tin plating be used?
ENIG supports hotter temperature soldering but costs more. It suits lead-free reflow profiles. Lower cost immersion tin finishes typically apply for hand soldering or standard eutectic solders.
What is the maximumCurrent higher layer counts support?
By distributing power across more layers, high layer count boards can achieve over 100 A current capacity. But this requires proper stackup configuration not dedicating all layers to power.
How does copper balance minimize board warping?
Symmetric thermal expansion on both sides avoids building up internal stresses. Unbalanced outer foil amounts lead to uneven expansion forces that translate to warpage.
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